[PATCH] D116270: [AMDGPU] Enable divergence-driven XNOR selection

Fri Dec 31 03:57:19 PST 2021

foad added a reviewer: foad.
foad added inline comments.

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Comment at: llvm/lib/Target/AMDGPU/VOP2Instructions.td:714

+def : GCNPat<
+  (i32 (DivergentUnaryFrag<not> (xor_oneuse i32:$src0, i32:$src1))),
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Why are these two patterns required? Surely we can just let the NOT and the XOR be selected individually. The only effect of these patterns is to swap the order of the NOT and the XOR, but if that is beneficial then surely it should be done as a DAG combine instead?

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Comment at: llvm/lib/Target/AMDGPU/VOPInstructions.td:797

+class DivergentUnaryFrag<SDPatternOperator Op> : PatFrag <
+  (ops node:$src0),
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Please rebase this patch on D116241.

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Comment at: llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll:1
+; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
+
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Also run this test on a subtarget that has v_xnor instructions?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116270/new/

https://reviews.llvm.org/D116270