[PATCH] D116398: [SelectionDAG][RISCV] Add preferred extend of value used for PHI node

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

The test case is quite complicated for what should be a simple thing to test. and is rather redundant in its IR; ignoring the nsw aspect, sext+sub+trunc is just sub of the smaller type, and the sext+icmp can just be icmp of the smaller type. Changing the latter seems to have no effect on the generated code, but for whatever reason changing the former to just sub on i16 already sign-extends at the computation site. Also, your `; preds` comments don't belong in IR tests, and the naming looks like you just took Clang output and hacked it into a test.

  define dso_local signext i16 @foo(i16 signext %a, i1 zeroext %b) {
  entry:
    br i1 %b, label %add, label %ret
  
  add:
    %0 = add i16 %a, 1
    br label %ret
  
  ret:
    %1 = phi i16 [ %a, %entry ], [ %0, %add ]
    ret i16 %1
  }

is a much simpler from-scratch test that should show the behaviour you want.



================
Comment at: llvm/test/CodeGen/RISCV/prefer-extend.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 < %s | FileCheck -check-prefixes=RV32S %s
+; RUN: llc -mtriple=riscv64 < %s | FileCheck -check-prefixes=RV64S %s
----------------
craig.topper wrote:
> What does the S mean after RV32/RV64?
I assume it's for signext, but that has no place here


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https://reviews.llvm.org/D116398