[PATCH] D109969: AMDGPU/GlobalISel: Add isel patterns for min3 and max3

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic updated this revision to Diff 396677.
Petar.Avramovic added a comment.

Use ThreeOpFrag for integer min3 and max3.
Floating point min3 and max3 use regular pattern since Tablegen does not support complex pattern (VOP3Mods) inside PatFrag which would count sgpr operands. There should not be many cases where this would make a big difference since sgpr float operands come as function arguments or uniform loads, there are no uniform versions of floating point instructions.
There should be no constant bus restriction errors (sdag also takes care of cst_bus_restrictions when it prints mir from selected DAG)

- integer min/max3 ThreeOpFrag handles cst_bus_restrictions
- float min/max3
  - sdag deals with cst_bus_restrictions when it prints mir from selected DAG
  - globalisel all float min/max3 operands are set to vgpr by regbankselect

Improve test coverage and add precommit for new tests.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109969/new/

https://reviews.llvm.org/D109969

Files:
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
  llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
  llvm/lib/Target/AMDGPU/GCNSubtarget.h
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/VOP3Instructions.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/fmax3.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fmin3.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/max3.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/min3.ll
  llvm/test/CodeGen/AMDGPU/ctlz.ll
  llvm/test/CodeGen/AMDGPU/cttz.ll
  llvm/test/CodeGen/AMDGPU/fmax3.ll
  llvm/test/CodeGen/AMDGPU/fmin3.ll
  llvm/test/CodeGen/AMDGPU/known-never-snan.ll
  llvm/test/CodeGen/AMDGPU/max3.ll
  llvm/test/CodeGen/AMDGPU/min3.ll

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