[PATCH] D116039: [X86] Combine reduce (add (mul x, y)) to VNNI instruction.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 29 14:59:05 PST 2021
craig.topper added inline comments.
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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:41860
+ // Extend or truncate to MVT::i8 first.
+ SDValue ZExt0 = Ext0;
+ SDValue SExt1 = Ext1;
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Just name the paramaters ZExt0 and SExt1 and get rid of Ext0 and Ext1?
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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:41870
+ // Find the appropriate width for the DotProduct.
+ EVT InVT = ZExt0.getValueType();
+ // VPDPBUSD(<16 x i32>C, <16 x i8>A, <16 x i8>B). For each dst element
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This just Vi8VT right?
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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:41895
+ // AVXVNNI/AVX512VNNI.
+ auto DpBuilder = [&](SelectionDAG &DAG, const SDLoc &DL,
+ ArrayRef<SDValue> Ops) {
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Is this lambda getting anything via `&` in the capture list or can it just be `[]`
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Comment at: llvm/lib/Target/X86/X86PartialReduction.cpp:100
+ (IsFreeTruncation(RHS) &&
+ ComputeMinSignedBits(RHS, *DL, 0, nullptr, nullptr) <= 8))
+ return true;
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Why pass `0, nullptr, nullptr` when those have default values?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116039/new/
https://reviews.llvm.org/D116039
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