[PATCH] D116310: [RISCV] Support passing scalable vector values through the stack.
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 27 17:36:11 PST 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa1c7ddf9264e: [RISCV] Support passing scalable vectur values through the stack. (authored by HsiangKai).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116310/new/
https://reviews.llvm.org/D116310
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
llvm/test/CodeGen/RISCV/rvv/unsupported-calling-conv.ll
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