[PATCH] D113784: [AMDGPU][GlobalISel] Try to rematerialize when repairing regbank

[Mirko Brkusanin via Phabricator via llvm-commits]

mbrkusanin updated this revision to Diff 396164.
mbrkusanin retitled this revision from "[AMDGPU][GlobalISel] Rematerialize consts when repairing regbank " to "[AMDGPU][GlobalISel] Try to rematerialize when repairing regbank ".
mbrkusanin edited the summary of this revision.
mbrkusanin added a comment.

- Added target check and covered G_FCONSTANT and G_IMPLICIT_DEF


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113784/new/

https://reviews.llvm.org/D113784

Files:
  llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
  llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
  llvm/test/CodeGen/AMDGPU/constrained-shift.ll
  llvm/test/CodeGen/AMDGPU/ctlz.ll
  llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
  llvm/test/CodeGen/AMDGPU/cttz.ll
  llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll

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