[llvm] 02478a2 - [RISCV] Use DAG variable directly instead of DCI.DAG
Jim Lin via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 23 21:14:36 PST 2021
Author: Jim Lin
Date: 2021-12-24T13:06:55+08:00
New Revision: 02478a26f269b6c212c4eb8b5e86d9fc641e9531
URL: https://github.com/llvm/llvm-project/commit/02478a26f269b6c212c4eb8b5e86d9fc641e9531
DIFF: https://github.com/llvm/llvm-project/commit/02478a26f269b6c212c4eb8b5e86d9fc641e9531.diff
LOG: [RISCV] Use DAG variable directly instead of DCI.DAG
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D116087
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 972928f2e5b4..4f5512e6fb37 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -7110,7 +7110,7 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
if (SimplifyDemandedLowBitsHelper(1, Log2_32(BitWidth)))
return SDValue(N, 0);
- return combineGREVI_GORCI(N, DCI.DAG);
+ return combineGREVI_GORCI(N, DAG);
}
case RISCVISD::GREVW:
case RISCVISD::GORCW: {
@@ -7119,7 +7119,7 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
SimplifyDemandedLowBitsHelper(1, 5))
return SDValue(N, 0);
- return combineGREVI_GORCI(N, DCI.DAG);
+ return combineGREVI_GORCI(N, DAG);
}
case RISCVISD::SHFL:
case RISCVISD::UNSHFL: {
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