[PATCH] D116215: [RISCV] Refactor immediate comparison instructions patterns

Chenbing.Zheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 23 18:34:19 PST 2021


Chenbing.Zheng updated this revision to Diff 396130.
Chenbing.Zheng retitled this revision from "[RISCV] Refactor some comparison instructions patterns" to "[RISCV] Refactor immediate comparison instructions patterns".
Chenbing.Zheng edited the summary of this revision.
Chenbing.Zheng added a comment.

1. Fix spelling errors and some formatting.
2. Modify vmsltu mapping to PseudoVMSLEU and fix failed cases


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116215/new/

https://reviews.llvm.org/D116215

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

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