[llvm] fd3cde6 - AMDGPU/GlobalISel: Fix attempt to select non-legal instr in mir test

[Petar Avramovic via llvm-commits]

Author: Petar Avramovic
Date: 2021-12-23T16:14:33+01:00
New Revision: fd3cde600ba6d3e9900b74d7022d1215571a6ee2

URL: https://github.com/llvm/llvm-project/commit/fd3cde600ba6d3e9900b74d7022d1215571a6ee2
DIFF: https://github.com/llvm/llvm-project/commit/fd3cde600ba6d3e9900b74d7022d1215571a6ee2.diff

LOG: AMDGPU/GlobalISel: Fix attempt to select non-legal instr in mir test

Delete inst-select-insert.xfail.mir.
G_INSERT instructions in inst-select-insert.xfail.mir are no longer
legal after D114198. This breaks build bots, since builds with
LLVM_ENABLE_ASSERTIONS=Off don't check for legality and report cannot
select while build with LLVM_ENABLE_ASSERTIONS=On reports instruction
is not legal.

Added: 
    

Modified: 
    

Removed: 
    llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.xfail.mir


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.xfail.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.xfail.mir
deleted file mode 100644
index 1720519b89e2..000000000000
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.xfail.mir
+++ /dev/null
@@ -1,39 +0,0 @@
-# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
-
-# ERR: remark: <unknown>:0:0: instruction is not legal: %3:sgpr(<4 x s16>) = G_INSERT %0:sgpr, %2:sgpr(s16), 0 (in function: insert_sgpr_s16_to_v4s16_offset0)
-# ERR-NEXT: <unknown>:0:0: instruction is not legal: %2:sgpr(<16 x s32>) = G_INSERT %0:sgpr, %1:sgpr(<8 x s32>), 0 (in function: insert_sgpr_v8s32_to_v16s32_offset0)
-# ERR-NOT: remark
-
-# FIXME: This 16-bit insert source should not be legal and this test
-# should be deleted
----
-name:            insert_sgpr_s16_to_v4s16_offset0
-legalized:       true
-regBankSelected: true
-
-body: |
-  bb.0:
-    liveins: $sgpr0_sgpr1, $sgpr2
-    %0:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1
-    %1:sgpr(s32) = COPY $sgpr2
-    %2:sgpr(s16) = G_TRUNC %1
-    %3:sgpr(<4 x s16>) = G_INSERT %0, %2, 0
-    S_ENDPGM 0, implicit %3
-
-...
-
-# getSubRegFromChannel current does not handle cases > 128-bits
----
-name:            insert_sgpr_v8s32_to_v16s32_offset0
-legalized:       true
-regBankSelected: true
-
-body: |
-  bb.0:
-    liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
-    %0:sgpr(<16 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
-    %1:sgpr(<8 x s32>) = COPY $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
-    %2:sgpr(<16 x s32>) = G_INSERT %0, %1, 0
-    S_ENDPGM 0, implicit %2
-
-...