[PATCH] D116187: [AMDGPU] Select build_vector DAG nodes according to the divergence

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 23 02:13:13 PST 2021


foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2463
 def : GCNPat <
   (v2i16 (build_vector (i16 SReg_32:$src0), (i16 undef))),
   (COPY_TO_REGCLASS SReg_32:$src0, SReg_32)
----------------
Does this pattern need to be marked as Uniform?


================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2468
 def : GCNPat <
   (v2i16 (build_vector (i16 VGPR_32:$src0), (i16 undef))),
   (COPY_TO_REGCLASS VGPR_32:$src0, VGPR_32)
----------------
Does this pattern need to be marked as Divergent?


================
Comment at: llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll:1
+; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GFX9 %s
----------------
This file should not be executable.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116187/new/

https://reviews.llvm.org/D116187



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