[PATCH] D113223: [VPlan] Add VPCanonicalIVRecipe, partly retire createInductionVariable.

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 395685.
fhahn added a comment.
Herald added a subscriber: dmgreen.

Rebased so this only depends on D115793 <https://reviews.llvm.org/D115793>.

Ping. This should now be ready for review.

Note that 2 new opcodes are added (InductionIncrement & InductionIncrementNUW). I explored extending VPInstruction to also allow specifying wrapping flags and use `Instruction::Add` opcode instead. But unfortunately this is not straight-forward, because we only want to generate a *single* scalar add to increment the canonical IV.

Another complication is that even for the fixed width vector case, we won't be able to represent the step in a single constant. In that case, the step is `VF * UF`, but a single VPlan can be valid for a range of VFs and the UF is only known during execution.

Therefore I think to make progress the separate opcodes are a good compromise.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113223/new/

https://reviews.llvm.org/D113223

Files:
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/lib/Transforms/Vectorize/VPlan.cpp
  llvm/lib/Transforms/Vectorize/VPlan.h
  llvm/lib/Transforms/Vectorize/VPlanValue.h
  llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
  llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
  llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
  llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
  llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
  llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
  llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
  llvm/test/Transforms/LoopVectorize/X86/small-size.ll
  llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
  llvm/test/Transforms/LoopVectorize/discriminator.ll
  llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
  llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
  llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
  llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
  llvm/test/Transforms/LoopVectorize/pointer-induction.ll
  llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
  llvm/test/Transforms/LoopVectorize/reduction-order.ll
  llvm/test/Transforms/LoopVectorize/select-reduction.ll
  llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
  llvm/test/Transforms/LoopVectorize/vplan-printing.ll
  llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
  llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
  llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
  llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll

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