[PATCH] D116072: [X86] GLC: Break false dependency for dest register for several instructions.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Target/X86/X86.td:447
                                      "LZCNT/TZCNT have a false dependency on dest register">;
 
 // On recent X86 (port bound) processors, its preferable to combine to a single shuffle
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(style) Keep all the FalseDeps tuning flags together?


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Comment at: llvm/lib/Target/X86/X86.td:999
   list<SubtargetFeature> ADLFeatures =
     !listconcat(TRMFeatures, ADLAdditionalFeatures);
 
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Out of interest - why is Alderlake defined with the atom core intel defs? I realise its big-little, but I'd still count it as a mainstream core and not an embedded budget core.


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  https://reviews.llvm.org/D116072/new/

https://reviews.llvm.org/D116072