[PATCH] D116039: [X86] Combine reduce (add (mul x, y)) to VNNI instruction.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added a comment.

In D116039#3202764 <https://reviews.llvm.org/D116039#3202764>, @lebedev.ri wrote:

> Any explicit checks for extension/truncation and their bitwidth delta instantly make me suspicious nowadays.

Pls comments on the code, so that I can easily understand.

> Does this deal with commutativity?

At X86ISelLowering.cpp : 41763

> I think what you want to check is the number of known sign bits / known leading zero bits.

Pls comments on the code, so that I can easily understand.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116039/new/

https://reviews.llvm.org/D116039