[PATCH] D116015: [PowerPC] Add generic fnmsub intrinsic

Qiu Chaofan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 19 20:49:01 PST 2021


qiucf created this revision.
qiucf added reviewers: rzurob, jsji, nemanjai, shchenz, PowerPC.
Herald added subscribers: kbarton, hiraditya.
qiucf requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

Currently in Clang, we have various builtins for `fnmsub` operation:

- `__builtin_vsx_xvnmsubasp`/`__builtin_vsx_xvnmsubadp` for float/double vector, they'll be transformed into `-fma(a, b, -c)` in LLVM IR
- `__builtin_ppc_fnmsubs`/`__builtin_ppc_fnmsub` for float/double scalar, they'll generate corresponding intrinsic in IR

But for the vector version of builtin, the 3 op chain may be recognized as expensive by some passes (like early cse). We need some way to keep the fnmsub form until code generation.

This new intrinsics, `llvm.ppc.nmsub.*`, can replace previous `llvm.ppc.fnmsub(s)` intrinsic. But now we've not enabled VSX FMA mutation pass, and `int_ppc_fnmsub(s)` generates M-form, we can replace them after fixing the pass.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D116015

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-ppc-fma.c
  clang/test/CodeGen/builtins-ppc-fpconstrained.c
  clang/test/CodeGen/builtins-ppc-vsx.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.ll

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