[llvm] 5bb21ce - [InstCombine] add tests for icmp with mul operand; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 19 08:58:03 PST 2021


Author: Sanjay Patel
Date: 2021-12-19T11:55:00-05:00
New Revision: 5bb21cea84a6dfba80acd593b2ebbc56ae5fcd1a

URL: https://github.com/llvm/llvm-project/commit/5bb21cea84a6dfba80acd593b2ebbc56ae5fcd1a
DIFF: https://github.com/llvm/llvm-project/commit/5bb21cea84a6dfba80acd593b2ebbc56ae5fcd1a.diff

LOG: [InstCombine] add tests for icmp with mul operand; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/icmp-mul.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/icmp-mul.ll b/llvm/test/Transforms/InstCombine/icmp-mul.ll
index 27886bc968521..15d36ca8ff763 100644
--- a/llvm/test/Transforms/InstCombine/icmp-mul.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-mul.ll
@@ -857,3 +857,31 @@ define i1 @mul_of_pow2_no_lz_other_op(i32 %x, i8 %y) {
   %r = icmp sgt i32 %m, 254
   ret i1 %r
 }
+
+define i1 @splat_mul_known_lz(i32 %x) {
+; CHECK-LABEL: @splat_mul_known_lz(
+; CHECK-NEXT:    [[Z:%.*]] = zext i32 [[X:%.*]] to i128
+; CHECK-NEXT:    [[M:%.*]] = mul nuw nsw i128 [[Z]], 18446744078004518913
+; CHECK-NEXT:    [[R:%.*]] = icmp ult i128 [[M]], 79228162514264337593543950336
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %z = zext i32 %x to i128
+  %m = mul i128 %z, 18446744078004518913 ; 0x00000000_00000001_00000001_00000001
+  %s = lshr i128 %m, 96
+  %r = icmp eq i128 %s, 0
+  ret i1 %r
+}
+
+define i1 @splat_mul_unknown_lz(i32 %x) {
+; CHECK-LABEL: @splat_mul_unknown_lz(
+; CHECK-NEXT:    [[Z:%.*]] = zext i32 [[X:%.*]] to i128
+; CHECK-NEXT:    [[M:%.*]] = mul nuw nsw i128 [[Z]], 18446744078004518913
+; CHECK-NEXT:    [[R:%.*]] = icmp ult i128 [[M]], 39614081257132168796771975168
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %z = zext i32 %x to i128
+  %m = mul i128 %z, 18446744078004518913 ; 0x00000000_00000001_00000001_00000001
+  %s = lshr i128 %m, 95
+  %r = icmp eq i128 %s, 0
+  ret i1 %r
+}


        


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