[PATCH] D115808: [DAGCombiner] Avoid combining adjacent stores at -O0 to improve debug experience

[Shivam Gupta via Phabricator via llvm-commits]

xgupta updated this revision to Diff 395260.
xgupta marked 9 inline comments as done.
xgupta added a comment.

address comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115808/new/

https://reviews.llvm.org/D115808

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/RISCV/optnone-store-no-combine.ll


Index: llvm/test/CodeGen/RISCV/optnone-store-no-combine.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/RISCV/optnone-store-no-combine.ll
@@ -0,0 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s
+
+; This test case makes sure that the same store will not get optimize out by DAGCombiner
+; and verify that codegen has the those stores in it.
+
+ at size = dso_local global i32 0, align 4
+
+define dso_local void @foo() noinline nounwind optnone {
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a0, %hi(size)
+; CHECK-NEXT:    li a1, 8
+; CHECK-NEXT:    sw a1, %lo(size)(a0)
+; CHECK-NEXT:    sw a1, %lo(size)(a0)
+; CHECK-NEXT:    sw a1, %lo(size)(a0)
+; CHECK-NEXT:    ret
+  store i32 8, i32* @size, align 4
+  store i32 8, i32* @size, align 4
+  store i32 8, i32* @size, align 4
+  ret void
+}
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -18280,8 +18280,8 @@
   if (StoreSDNode *ST1 = dyn_cast<StoreSDNode>(Chain)) {
     if (ST->isUnindexed() && ST->isSimple() &&
         ST1->isUnindexed() && ST1->isSimple()) {
-      if (ST1->getBasePtr() == Ptr && ST1->getValue() == Value &&
-          ST->getMemoryVT() == ST1->getMemoryVT() &&
+      if (OptLevel != CodeGenOpt::None && ST1->getBasePtr() == Ptr &&
+          ST1->getValue() == Value && ST->getMemoryVT() == ST1->getMemoryVT() &&
           ST->getAddressSpace() == ST1->getAddressSpace()) {
         // If this is a store followed by a store with the same value to the
         // same location, then the store is dead/noop.


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