[PATCH] D115969: [Support] improve known bits analysis for leading zeros of multiply
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 17 13:34:25 PST 2021
spatel created this revision.
spatel added reviewers: lebedev.ri, efriedma, RKSimon.
Herald added subscribers: dexonsmith, pengfei, hiraditya, mcrosier.
spatel requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Instead of summing leading zeros on the input operands, multiply the max possible values of those inputs and count the leading zeros of the result. This can give us an extra zero bit (typically in cases where one of the operands is a known constant).
This allows folding away the remaining 'add' ops in the motivating bug (modeled in the PhaseOrdering IR test):
https://llvm.org/PR48399
https://reviews.llvm.org/D115969
Files:
llvm/lib/Support/KnownBits.cpp
llvm/test/CodeGen/X86/mul128.ll
llvm/test/Transforms/InstCombine/icmp-mul.ll
llvm/test/Transforms/InstCombine/narrow-switch.ll
llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
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