[PATCH] D115808: [DAGCombiner] Avoid combining adjacent stores at -O0 to improve debug experience

Fri Dec 17 09:40:04 PST 2021

jrtc27 added inline comments.

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Comment at: llvm/test/CodeGen/RISCV/dbg-combine.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s
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xgupta wrote:
> jrtc27 wrote:
> > This is way too complicated a test case. All you need is IR that makes the same store twice and verify the codegen has the two stores in it.
> > 
> > It's also clearly *not* currently using utils/update_llc_test_checks.py.
> Yes, I have tried, but check lines are not generated. I will look tomorrow at how to make that script work and think of reducing test case.
You don't need to look at the debug info. The only thing you need to check is that the assembly has the redundant store in it. That's what this patch is actually changing, so is what should be tested.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115808/new/

https://reviews.llvm.org/D115808