[PATCH] D111221: [AArch64][SVE] Improve code generation for VLS i1 masks

[David Truby via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG7e44eb079d99: [AArch64][SVE] Improve code generation for VLS i1 masks (authored by DavidTruby).

Changed prior to commit:
  https://reviews.llvm.org/D111221?vs=395139&id=395143#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111221/new/

https://reviews.llvm.org/D111221

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
  llvm/test/CodeGen/AArch64/sve-punpklo-combine.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D111221.395143.patch
Type: text/x-patch
Size: 66710 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211217/94834105/attachment.bin>