[PATCH] D115881: [WIP][AMDGPU][GlobalISel] Add patterns for no-return atomic ops with single address and data in tblgen.
Petar Avramovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 16 08:07:41 PST 2021
Petar.Avramovic added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/DSInstructions.td:130
+: DS_Pseudo<opName,
+ (outs data_op:$vdst), // FIXME: Empty (outs) is not working in global-isel.
+ (ins VGPR_32:$addr, getLdStRegisterOperand<rc>.ret:$data0, offset:$offset, gds:$gds),
----------------
abinavpp wrote:
> This is incorrect, breaking the MC tests and might be related to the change in
> SIInsertWaitcnts behaviour in some of the modified tests. How can we fix this?
// FIXME: Empty (outs) is not working in global-isel.
Check GlobalISelEmitter.cpp for:
```
if (DstI.Operands.NumDefs < Src->getExtTypes().size())
return failedImport("Src pattern result has more defs than dst MI (" +
to_string(Src->getExtTypes().size()) + " def(s) vs " +
to_string(DstI.Operands.NumDefs) + " def(s))");
```
no ret has unused return in mir right? You want nothing in the output.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115881/new/
https://reviews.llvm.org/D115881
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