[PATCH] D114800: [PowerPC] Replace MFVSRLD with MFVSRD when the vector is symmetrical

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp updated this revision to Diff 394870.
stefanp added a comment.

Updated the patch to use isCommutable instead of listing the instructions
individually.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114800/new/

https://reviews.llvm.org/D114800

Files:
  llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  llvm/test/CodeGen/PowerPC/reduce_scalarization.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-add.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-and.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-or.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll

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