[PATCH] D109969: AMDGPU/GlobalISel: Add isel patterns for min3 and max3

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 16 04:56:00 PST 2021


foad added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/ctlz.ll:578
 ; GFX10-NEXT:    s_flbit_i32_b32 s0, s3
-; GFX10-NEXT:    v_min3_u32 v0, v0, s0, 64
+; GFX10-NEXT:    v_min_u32_e32 v0, s0, v0
+; GFX10-NEXT:    v_min_u32_e32 v0, 64, v0
----------------
Regression here.


================
Comment at: llvm/test/CodeGen/AMDGPU/max3.ll:263
 
+; GCN-LABEL: {{^}}max3_u32_uniform:
+; GCN: s_max_u32
----------------
Please precommit new tests like this.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109969/new/

https://reviews.llvm.org/D109969



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