[llvm] 78415b5 - [RISCV] Precommit a test for vector copy conversion under implicit-def.

[Hsiangkai Wang via llvm-commits]

Author: Hsiangkai Wang
Date: 2021-12-16T18:04:38+08:00
New Revision: 78415b5044e8d49807b90f0081c7dbbf2fd8690e

URL: https://github.com/llvm/llvm-project/commit/78415b5044e8d49807b90f0081c7dbbf2fd8690e
DIFF: https://github.com/llvm/llvm-project/commit/78415b5044e8d49807b90f0081c7dbbf2fd8690e.diff

LOG: [RISCV] Precommit a test for vector copy conversion under implicit-def.

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir b/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
index e4b232572d526..19eeea2aa4720 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
@@ -299,3 +299,31 @@ body:             |
     $v28 = PseudoVLE32_V_MF2 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
     $v12 = COPY $v28
 ...
+---
+name: copy_implicit_def
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $x12, $x14, $x16
+    ; 80 = e32,m1
+    ; CHECK-LABEL: name: copy_implicit_def
+    ; CHECK: liveins: $x12, $x14, $x16
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: $x0 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype
+    ; CHECK-NEXT: $v8_v9_v10_v11_v12_v13_v14_v15 = PseudoVLSEG8E32_V_M1 killed $x12, $noreg, 5, implicit $vl, implicit $vtype
+    ; CHECK-NEXT: $x0 = PseudoVSETIVLI 10, 80, implicit-def $vl, implicit-def $vtype
+    ; CHECK-NEXT: $v15 = PseudoVLE32_V_M1 killed $x16, $noreg, 5, implicit $vl, implicit $vtype, implicit killed $v8_v9_v10_v11_v12_v13_v14_v15, implicit-def $v8_v9_v10_v11_v12_v13_v14_v15
+    ; CHECK-NEXT: $v24 = PseudoVMV_V_V_M1 killed $v8, $noreg, 5, implicit $vl, implicit $vtype
+    ; CHECK-NEXT: $v25 = PseudoVMV_V_V_M1 killed $v9, $noreg, 5, implicit $vl, implicit $vtype
+    ; CHECK-NEXT: $v26 = PseudoVMV_V_V_M1 killed $v10, $noreg, 5, implicit $vl, implicit $vtype
+    ; CHECK-NEXT: $v27 = PseudoVMV_V_V_M1 killed $v11, $noreg, 5, implicit $vl, implicit $vtype
+    ; CHECK-NEXT: $v28 = PseudoVMV_V_V_M1 killed $v12, $noreg, 5, implicit $vl, implicit $vtype
+    ; CHECK-NEXT: $v29 = PseudoVMV_V_V_M1 killed $v13, $noreg, 5, implicit $vl, implicit $vtype
+    ; CHECK-NEXT: $v30 = PseudoVMV_V_V_M1 killed $v14, $noreg, 5, implicit $vl, implicit $vtype
+    ; CHECK-NEXT: $v31 = PseudoVMV_V_V_M1 killed $v15, $noreg, 5, implicit $vl, implicit $vtype
+    $x0 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype
+    $v8_v9_v10_v11_v12_v13_v14_v15 = PseudoVLSEG8E32_V_M1 killed $x12, $noreg, 5, implicit $vl, implicit $vtype
+    $x0 = PseudoVSETIVLI 10, 80, implicit-def $vl, implicit-def $vtype
+    $v15 = PseudoVLE32_V_M1 killed $x16, $noreg, 5, implicit $vl, implicit $vtype, implicit killed $v8_v9_v10_v11_v12_v13_v14_v15, implicit-def $v8_v9_v10_v11_v12_v13_v14_v15
+    $v24_v25_v26_v27_v28_v29_v30_v31 = COPY killed $v8_v9_v10_v11_v12_v13_v14_v15
+...