[PATCH] D114856: [RISCV] Override TargetLowering::BuildSDIVPow2 to generate SELECT
Wang Pengcheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 15 18:53:24 PST 2021
pcwang-thead added a comment.
In D114856#3196325 <https://reviews.llvm.org/D114856#3196325>, @jrtc27 wrote:
> From the LLVM Code-Review Policy and Practices (https://llvm.org/docs/CodeReview.html):
>
>> If it is urgent, provide reasons why it is important to you to get this patch landed and ping it every couple of days. If it is not urgent, the common courtesy ping rate is one week. Remember that you’re asking for valuable time from other professional developers.
>
> It's only been 3 days for this and other patches you've just pinged
Sorry, my bad. It's not so urgent.
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rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D114856/new/
https://reviews.llvm.org/D114856
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