[PATCH] D114652: [AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 15 16:40:03 PST 2021
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2081
+ BuildMI(MBB, MI, DL, get(AMDGPU::S_SETPC_B64_return))
+ .addReg(TRI->getReturnAddressReg(*MF), RegState::Undef);
+
----------------
If we're going to just hardcode this to s[30:31], probably should do away with getReturnAddressReg
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2084-2089
+ for (unsigned i = Desc.getNumOperands(), e = MI.getNumOperands(); i != e;
+ ++i) {
+ const MachineOperand &MO = MI.getOperand(i);
+ assert(MO.isReg() && MO.getReg());
+ MIB.add(MO);
+ }
----------------
There's a copyImplicitOperands helper for this
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D114652/new/
https://reviews.llvm.org/D114652
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