[PATCH] D115688: [SelectionDAG] treat X constrained labels as i for asm

Nick Desaulniers via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 14 16:58:33 PST 2021


nickdesaulniers added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:4595-4626
-    GlobalAddressSDNode *GA;
     ConstantSDNode *C;
-    BlockAddressSDNode *BA;
     uint64_t Offset = 0;
 
     // Match (GA) or (C) or (GA+C) or (GA-C) or ((GA+C)+C) or (((GA+C)+C)+C),
     // etc., since getelementpointer is variadic. We can't use
----------------
Note to reviewers: I got a little carried away refactoring the existing code here.  If it's too distracting from this review, I'm happy to pre-commit this hunk.


================
Comment at: llvm/test/CodeGen/AArch64/inlineasm-X-constraint.ll:124
 ;   void* a = &&A;
 ;   asm volatile ("bl %0" : : "X" (a));
 ;  A:
----------------
Note to reviewers, the below code modified looks like it was originally a typo, based on this comment.


================
Comment at: llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll:20
 ; CHECK-NEXT: t22: ch,glue = CopyToReg t17, Register:i32 %5, t8
-; CHECK-NEXT: t29: ch,glue = inlineasm_br t22, {{.*}}, t22:1
+; CHECK-NEXT: t30: ch,glue = inlineasm_br t22, TargetExternalSymbol:i64'xorl $0, $0; jmp ${1:l}', MDNode:ch<null>, TargetConstant:i64<8>, TargetConstant:i32<2293769>, Register:i32 %5, TargetConstant:i64<13>, TargetBlockAddress:i64<@test, %fail> 0, TargetConstant:i32<12>, Register:i32 $df, TargetConstant:i32<12>, Register:i16 $fpsw, TargetConstant:i32<12>, Register:i32 $eflags, t22:1
 
----------------
Note to reviewers: I'm happy to pre-commit removing this regex so that we can better see here what changed. Please let me know if that would be worthwhile.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115688/new/

https://reviews.llvm.org/D115688



More information about the llvm-commits mailing list