[PATCH] D112531: [RFC][DataLayout] Allow vector specifications by element size

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 14 10:01:59 PST 2021


frasercrmck added a comment.

In D112531#3170485 <https://reviews.llvm.org/D112531#3170485>, @nikic wrote:

> Based on you the discussion in your comment, I think the important bit is that there is a viable future extension path: Even if we have just `ve` now, we can later extend that to also include a minimal total vector size etc using the scheme you suggest, if it becomes necessary. That looks like a backwards-compatible extension to me. Though probably checking with llvm-dev wouldn't hurt.

I've sent out a message to llvm-dev to gather any suggestions. I'm not sure how long to leave it though.

In D112531#3170999 <https://reviews.llvm.org/D112531#3170999>, @craig.topper wrote:

> While the spec doesn't require RVV vectors to be more aligned than element size. A given microarchitecture may be more optimal if data is aligned to a VLEN chunk or perhaps a fraction of a VLEN chunk. So the preferred alignment for such a CPU would be more than element alignment. Though maybe data layout isn't the right place to handle microarchitectural differences like that.

That's an interesting point. I agree it's not really something for the data layout but I also can't think of where better fits that sort of thing.


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