[PATCH] D108694: [RISCV] Add the zvl extension according to the v1.0 spec

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 14 06:47:50 PST 2021


frasercrmck added inline comments.


================
Comment at: clang/test/Preprocessor/riscv-target-features.c:230
+// RUN: | FileCheck --check-prefix=CHECK-V-MINVLEN %s
+// CHECK-V-MINVLEN: __riscv_v_min_vlen 128
----------------
Are we able to test non-default values of `__riscv_v_min_vlen` here?


================
Comment at: llvm/lib/Target/RISCV/RISCVSubtarget.cpp:119
+  if (ZvlLen > RVVVectorBitsMax)
+    return 0;
+  // FIXME: Change to >= 32 when VLEN = 32 is supported
----------------
Is this intuitive behaviour? If the user supplies `RVVVectorBitsMax` and it's less than `ZvlLen`, should it silently return? Or do we instead see `RVVVectorBitsMax` as a user-guided limit //on top// of the architecture? Which means it can be less but not more? I'm not sure.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108694/new/

https://reviews.llvm.org/D108694



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