[PATCH] D115629: [RISCV] Use binvi and bexti to fold and (not (srl X, C)), 1

Jianjian Guan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 13 23:10:21 PST 2021


jacquesguan updated this revision to Diff 394153.
jacquesguan added a comment.

Add xor (and (srl X, C), 1), 1 test case.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115629/new/

https://reviews.llvm.org/D115629

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
  llvm/test/CodeGen/RISCV/rv32zbs.ll

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