[llvm] a6a07a5 - [MachineOutliner] Don't outline functions starting with PATCHABLE_FUNCTION_ENTER/FENTRL_CALL

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 13 13:24:36 PST 2021


Author: Fangrui Song
Date: 2021-12-13T13:24:29-08:00
New Revision: a6a07a514b8a084feaa7f4f15d569698b9840d83

URL: https://github.com/llvm/llvm-project/commit/a6a07a514b8a084feaa7f4f15d569698b9840d83
DIFF: https://github.com/llvm/llvm-project/commit/a6a07a514b8a084feaa7f4f15d569698b9840d83.diff

LOG: [MachineOutliner] Don't outline functions starting with PATCHABLE_FUNCTION_ENTER/FENTRL_CALL

MachineOutliner may outline a "patchable-function-entry" function whose body has
a TargetOpcode::PATCHABLE_FUNCTION_ENTER MachineInstr. This is incorrect because
the special code sequence must stay unchanged to be used at run-time.
Avoid outlining PATCHABLE_FUNCTION_ENTER. While here, avoid outlining FENTRY_CALL too
(which doesn't reproduce currently) to allow phase ordering flexibility.

Fixes #52635

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D115614

Added: 
    llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll
    llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll

Modified: 
    llvm/include/llvm/CodeGen/TargetInstrInfo.h
    llvm/lib/CodeGen/TargetInstrInfo.cpp
    llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index aefdbad79adaf..58b8e59b68d7b 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -1927,9 +1927,7 @@ class TargetInstrInfo : public MCInstrInfo {
   /// Optional target hook that returns true if \p MBB is safe to outline from,
   /// and returns any target-specific information in \p Flags.
   virtual bool isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
-                                      unsigned &Flags) const {
-    return true;
-  }
+                                      unsigned &Flags) const;
 
   /// Insert a custom frame for outlined functions.
   virtual void buildOutlinedFrame(MachineBasicBlock &MBB, MachineFunction &MF,

diff  --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp
index 6dd4dc28845a3..3f22cc4289f2d 100644
--- a/llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -1418,3 +1418,16 @@ void TargetInstrInfo::mergeOutliningCandidateAttributes(
       }))
     F.addFnAttr(Attribute::NoUnwind);
 }
+
+bool TargetInstrInfo::isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
+                                             unsigned &Flags) const {
+  // Some instrumentations create special TargetOpcode at the start which
+  // expands to special code sequences which must be present.
+  auto First = MBB.getFirstNonDebugInstr();
+  if (First != MBB.end() &&
+      (First->getOpcode() == TargetOpcode::FENTRY_CALL ||
+       First->getOpcode() == TargetOpcode::PATCHABLE_FUNCTION_ENTER))
+    return false;
+
+  return true;
+}

diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index f8f8ee3f1e6c8..5fc5e4e5eb359 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -7055,6 +7055,8 @@ bool AArch64InstrInfo::isFunctionSafeToOutlineFrom(
 
 bool AArch64InstrInfo::isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
                                               unsigned &Flags) const {
+  if (!TargetInstrInfo::isMBBSafeToOutlineFrom(MBB, Flags))
+    return false;
   // Check if LR is available through all of the MBB. If it's not, then set
   // a flag.
   assert(MBB.getParent()->getRegInfo().tracksLiveness() &&

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 547d82550cacc..2dd583439741a 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -1254,7 +1254,7 @@ bool RISCVInstrInfo::isFunctionSafeToOutlineFrom(
 bool RISCVInstrInfo::isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
                                             unsigned &Flags) const {
   // More accurate safety checking is done in getOutliningCandidateInfo.
-  return true;
+  return TargetInstrInfo::isMBBSafeToOutlineFrom(MBB, Flags);
 }
 
 // Enum values indicating how an outlined call should be constructed.

diff  --git a/llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll b/llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll
new file mode 100644
index 0000000000000..e381b49ee8dc0
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll
@@ -0,0 +1,114 @@
+; RUN: llc < %s -verify-machineinstrs -enable-machine-outliner | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+declare void @foo(i32, i32, i32, i32) minsize
+
+;; TargetOpcode::FENTRY_CALL at the start of the function expands to a __fentry__
+;; call which must be present. Don't outline it.
+define void @fentry0(i1 %a) nounwind "fentry-call"="true" {
+; CHECK-LABEL: fentry0:
+; CHECK-NEXT:  // %bb.0:
+; CHECK-NEXT:    # FEntry call
+; CHECK:       // %bb.1:
+; CHECK-NEXT:    bl OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+define void @fentry1(i1 %a) nounwind "fentry-call"="true" {
+; CHECK-LABEL: fentry1:
+; CHECK-NEXT:  // %bb.0:
+; CHECK-NEXT:    # FEntry call
+; CHECK:       // %bb.1:
+; CHECK-NEXT:    bl OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+;; TargetOpcode::PATCHABLE_FUNCTION_ENTER at the start of the function expands to
+;; NOPs which must be present. Don't outline them.
+define void @patchable0(i1 %a) nounwind "patchable-function-entry"="2" {
+; CHECK-LABEL: patchable0:
+; CHECK-NEXT:  .Lfunc_begin0:
+; CHECK-NEXT:  // %bb.0:
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK:       // %bb.1:
+; CHECK-NEXT:    bl OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+define void @patchable1(i1 %a) nounwind "patchable-function-entry"="2" {
+; CHECK-LABEL: patchable1:
+; CHECK-NEXT:  .Lfunc_begin1:
+; CHECK-NEXT:  // %bb.0:
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK:       // %bb.1:
+; CHECK-NEXT:    bl OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+;; Similar to "patchable-function-entry".
+define void @xray0(i1 %a) nounwind "function-instrument"="xray-always" {
+; CHECK-LABEL: xray0:
+; CHECK-NEXT:  .Lfunc_begin2:
+; CHECK-NEXT:  // %bb.0:
+; CHECK-NEXT:  .p2align 2
+; CHECK-NEXT:  .Lxray_sled_0:
+; CHECK:       // %bb.1:
+; CHECK-NEXT:    bl OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+define void @xray1(i1 %a) nounwind "function-instrument"="xray-always" {
+; CHECK-LABEL: xray1:
+; CHECK-NEXT:  .Lfunc_begin3:
+; CHECK-NEXT:  // %bb.0:
+; CHECK-NEXT:  .p2align 2
+; CHECK-NEXT:  .Lxray_sled_2:
+; CHECK:       // %bb.1:
+; CHECK-NEXT:    bl OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}

diff  --git a/llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll b/llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll
new file mode 100644
index 0000000000000..4ef3abd241577
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll
@@ -0,0 +1,77 @@
+; RUN: llc < %s -verify-machineinstrs -enable-machine-outliner | FileCheck %s
+
+target triple = "riscv64-unknown-linux-gnu"
+
+declare void @foo(i32, i32, i32, i32) minsize
+
+;; TargetOpcode::FENTRY_CALL at the start of the function expands to a __fentry__
+;; call which must be present. Don't outline it.
+define void @fentry0(i1 %a) nounwind "fentry-call"="true" {
+; CHECK-LABEL: fentry0:
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    # FEntry call
+; CHECK:       # %bb.1:
+; CHECK-NEXT:    call t0, OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+define void @fentry1(i1 %a) nounwind "fentry-call"="true" {
+; CHECK-LABEL: fentry1:
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    # FEntry call
+; CHECK:       # %bb.1:
+; CHECK-NEXT:    call t0, OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+;; TargetOpcode::PATCHABLE_FUNCTION_ENTER at the start of the function expands to
+;; NOPs which must be present. Don't outline them.
+define void @patchable0(i1 %a) nounwind "patchable-function-entry"="2" {
+; CHECK-LABEL: patchable0:
+; CHECK-NEXT:  .Lfunc_begin0:
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK:       # %bb.1:
+; CHECK-NEXT:    call t0, OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+define void @patchable1(i1 %a) nounwind "patchable-function-entry"="2" {
+; CHECK-LABEL: patchable1:
+; CHECK-NEXT:  .Lfunc_begin1:
+; CHECK-NEXT:  # %bb.0:
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    nop
+; CHECK:       # %bb.1:
+; CHECK-NEXT:    call t0, OUTLINED_FUNCTION_1
+entry:
+  br i1 %a, label %if.then, label %if.end
+if.then:
+  call void @foo(i32 1, i32 2, i32 3, i32 4)
+  br label %if.end
+if.end:
+  call void @foo(i32 5, i32 6, i32 7, i32 8)
+  ret void
+}


        


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