[PATCH] D115457: [AArch64] Convert sra(X, elt_size(X)-1) to cmlt(X, 0)

[Alexandros Lamprineas via Phabricator via llvm-commits]

labrinea updated this revision to Diff 393987.
labrinea edited the summary of this revision.
labrinea added a comment.

- Reimplemented the transformation using tablegen patterns.
- Updated the description to explain the motivation behind this change.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115457/new/

https://reviews.llvm.org/D115457

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/Analysis/CostModel/AArch64/vector-select.ll
  llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
  llvm/test/CodeGen/AArch64/arm64-vshr.ll
  llvm/test/CodeGen/AArch64/cmp-select-sign.ll
  llvm/test/CodeGen/AArch64/dag-numsignbits.ll
  llvm/test/CodeGen/AArch64/div_minsize.ll
  llvm/test/CodeGen/AArch64/selectcc-to-shiftand.ll
  llvm/test/CodeGen/AArch64/srem-seteq-vec-splat.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-vselect.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
  llvm/test/CodeGen/AArch64/vec_uaddo.ll
  llvm/test/CodeGen/AArch64/vec_umulo.ll
  llvm/test/CodeGen/AArch64/vselect-constants.ll

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