[PATCH] D115629: [RISCV] Use binvi and bexti to fold and (not (srl X, C)), 1

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan created this revision.
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When have zbs, we could use binvi and bexti to fold and (not (srl X, C)), 1


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D115629

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
  llvm/test/CodeGen/RISCV/rv32zbs.ll


Index: llvm/test/CodeGen/RISCV/rv32zbs.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv32zbs.ll
+++ llvm/test/CodeGen/RISCV/rv32zbs.ll
@@ -357,6 +357,46 @@
   ret i64 %and
 }
 
+define i32 @sbexti_binvi_i32(i32 %a) nounwind {
+; RV32I-LABEL: sbexti_binvi_i32:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    srli a0, a0, 7
+; RV32I-NEXT:    not a0, a0
+; RV32I-NEXT:    andi a0, a0, 1
+; RV32I-NEXT:    ret
+;
+; RV32ZBS-LABEL: sbexti_binvi_i32:
+; RV32ZBS:       # %bb.0:
+; RV32ZBS-NEXT:    binvi a0, a0, 7
+; RV32ZBS-NEXT:    bexti a0, a0, 7
+; RV32ZBS-NEXT:    ret
+  %shr = lshr i32 %a, 7
+  %not = xor i32 %shr, -1
+  %and = and i32 %not, 1
+  ret i32 %and
+}
+
+define i64 @sbexti_binvi_i64(i64 %a) nounwind {
+; RV32I-LABEL: sbexti_binvi_i64:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    srli a0, a0, 7
+; RV32I-NEXT:    not a0, a0
+; RV32I-NEXT:    andi a0, a0, 1
+; RV32I-NEXT:    li a1, 0
+; RV32I-NEXT:    ret
+;
+; RV32ZBS-LABEL: sbexti_binvi_i64:
+; RV32ZBS:       # %bb.0:
+; RV32ZBS-NEXT:    binvi a0, a0, 7
+; RV32ZBS-NEXT:    bexti a0, a0, 7
+; RV32ZBS-NEXT:    li a1, 0
+; RV32ZBS-NEXT:    ret
+  %shr = lshr i64 %a, 7
+  %not = xor i64 %shr, -1
+  %and = and i64 %not, 1
+  ret i64 %and
+}
+
 define i32 @sbclri_i32_10(i32 %a) nounwind {
 ; RV32I-LABEL: sbclri_i32_10:
 ; RV32I:       # %bb.0:
Index: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
@@ -791,6 +791,10 @@
 def : Pat<(and (srl GPR:$rs1, uimmlog2xlen:$shamt), (XLenVT 1)),
           (BEXTI GPR:$rs1, uimmlog2xlen:$shamt)>;
 
+def : Pat<(and (not (srl GPR:$rs1, uimmlog2xlen:$shamt)), (XLenVT 1)),
+          (BEXTI (BINVI GPR:$rs1, uimmlog2xlen:$shamt),
+                 uimmlog2xlen:$shamt)>;
+
 def : Pat<(or GPR:$r, BSETINVTwoBitsMask:$i),
           (BSETI (BSETI GPR:$r, (TrailingZerosXForm BSETINVTwoBitsMask:$i)),
                  (BSETINVTwoBitsMaskHigh BSETINVTwoBitsMask:$i))>;


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