[llvm] 9633df0 - [NFC][X86] Precommit tests for memset with minsize being present
Daniil Seredkin via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 12 10:44:43 PST 2021
Author: Daniil Seredkin
Date: 2021-12-13T01:41:09+07:00
New Revision: 9633df04d9b2654460bfe14b5dcdf07859e1add0
URL: https://github.com/llvm/llvm-project/commit/9633df04d9b2654460bfe14b5dcdf07859e1add0
DIFF: https://github.com/llvm/llvm-project/commit/9633df04d9b2654460bfe14b5dcdf07859e1add0.diff
LOG: [NFC][X86] Precommit tests for memset with minsize being present
Added:
llvm/test/CodeGen/X86/memset-minsize.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/memset-minsize.ll b/llvm/test/CodeGen/X86/memset-minsize.ll
new file mode 100644
index 000000000000..6929353a9021
--- /dev/null
+++ b/llvm/test/CodeGen/X86/memset-minsize.ll
@@ -0,0 +1,148 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+
+define void @tiny_memset_to_rep_stos(i32* %ptr) minsize nounwind {
+; CHECK-LABEL: tiny_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: andq $0, (%rdi)
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i32* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 8, i1 false)
+ ret void
+}
+
+define void @small_memset_to_rep_stos(i32* %ptr) minsize nounwind {
+; CHECK-LABEL: small_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq $32
+; CHECK-NEXT: popq %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: rep;stosl %eax, %es:(%rdi)
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i32* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 128, i1 false)
+ ret void
+}
+
+define void @medium_memset_to_rep_stos(i32* %ptr) minsize nounwind {
+; CHECK-LABEL: medium_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: movl $512, %edx # imm = 0x200
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: callq memset at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i32* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 512, i1 false)
+ ret void
+}
+
+define void @large_memset_to_rep_stos(i32* %ptr) minsize nounwind {
+; CHECK-LABEL: large_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: movl $4096, %edx # imm = 0x1000
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: callq memset at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i32* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 4096, i1 false)
+ ret void
+}
+
+define void @huge_memset_to_rep_stos(i32* %ptr) minsize nounwind {
+; CHECK-LABEL: huge_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: movl $8192, %edx # imm = 0x2000
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: callq memset at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i32* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 8192, i1 false)
+ ret void
+}
+
+define void @odd_length_memset_to_rep_stos(i32* %ptr) minsize nounwind {
+; CHECK-LABEL: odd_length_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: movl $255, %edx
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: callq memset at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i32* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 255, i1 false)
+ ret void
+}
+
+define void @align_1_memset_to_rep_stos(i8* %ptr) minsize nounwind {
+; CHECK-LABEL: align_1_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: movl $256, %edx # imm = 0x100
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: callq memset at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ call void @llvm.memset.p0i8.i32(i8* align 1 %ptr, i8 0, i32 256, i1 false)
+ ret void
+}
+
+define void @align_2_memset_to_rep_stos(i16* %ptr) minsize nounwind {
+; CHECK-LABEL: align_2_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: movl $256, %edx # imm = 0x100
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: callq memset at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i16* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 2 %0, i8 0, i32 256, i1 false)
+ ret void
+}
+
+define void @align_4_memset_to_rep_stos(i16* %ptr) minsize nounwind {
+; CHECK-LABEL: align_4_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: movl $256, %edx # imm = 0x100
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: callq memset at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i16* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 256, i1 false)
+ ret void
+}
+
+define void @align_8_memset_to_rep_stos(i64* %ptr) minsize nounwind {
+; CHECK-LABEL: align_8_memset_to_rep_stos:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: movl $256, %edx # imm = 0x100
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: callq memset at PLT
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = bitcast i64* %ptr to i8*
+ call void @llvm.memset.p0i8.i32(i8* align 8 %0, i8 0, i32 256, i1 false)
+ ret void
+}
+
+declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1)
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