[PATCH] D115551: [AMDGPU] Do not reserve any VGPR for SGPR spills

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa created this revision.
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After the split register allocation changes in eebe841a47cb <https://reviews.llvm.org/rGeebe841a47cbbd55bdcc32da943c92d18f88a5b8> it is no
longer necessary to reserve a VGPR before RA. This can also create bugs
when IPRA is enabled since we cannot predict that a called function may
not reserve any register if it does not have any SGPR spills. If that
happens those functions may override reserved registers that are
normally callee saved. Added a test to show this.

Fixes: SWDEV-309900


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D115551

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
  llvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll
  llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll

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