[llvm] 5861cf7 - [RISCV] Remove FCSR from RISCVRegisterInfo.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 10 09:24:20 PST 2021
Author: Craig Topper
Date: 2021-12-10T09:24:13-08:00
New Revision: 5861cf77da4f7d235d435dd8fb89b100d1698112
URL: https://github.com/llvm/llvm-project/commit/5861cf77da4f7d235d435dd8fb89b100d1698112
DIFF: https://github.com/llvm/llvm-project/commit/5861cf77da4f7d235d435dd8fb89b100d1698112.diff
LOG: [RISCV] Remove FCSR from RISCVRegisterInfo.
We only used this to mark it as a reserved register. But that's not
important if we don't do anything else with it.
I think if we were ever to do anything with it, we would need to
model it as a super register of FRM and FFLAGS. But it might be
easier to reference both FRM and FFLAGS in implicit defs/uses
for anything we were to do with "fcsr".
Reviewed By: sepavloff
Differential Revision: https://reviews.llvm.org/D115455
Added:
Modified:
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index 798532d5bc44e..9094dff1dda18 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -105,7 +105,6 @@ BitVector RISCVRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
// Floating point environment registers.
markSuperRegs(Reserved, RISCV::FRM);
markSuperRegs(Reserved, RISCV::FFLAGS);
- markSuperRegs(Reserved, RISCV::FCSR);
assert(checkAllSuperRegsMarked(Reserved));
return Reserved;
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
index 4e03f506d437e..20903b317180e 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
@@ -577,7 +577,6 @@ foreach m = LMULList.m in {
// Special registers
def FFLAGS : RISCVReg<0, "fflags">;
def FRM : RISCVReg<0, "frm">;
-def FCSR : RISCVReg<0, "fcsr">;
// Any type register. Used for .insn directives when we don't know what the
// register types could be.
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