[PATCH] D114946: [AArch64] Add instruction selection for strict FP

John Brawn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 10 06:24:40 PST 2021


john.brawn added a comment.

In D114946#3182147 <https://reviews.llvm.org/D114946#3182147>, @dmgreen wrote:

> This is still a pretty big patch. Is it possible to break it up into some logically separate parts?

The best I've been able to do is break out the parts related to fp16 legalization and lowering out into a separate patch, which I'll have ready later today.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1424
+
+  // Strict operations that correspond to a single instruction are legal, though
+  // for fp16 they need to be promoted/expanded when we don't have those
----------------
dmgreen wrote:
> Is it better to have a section like this which is all the "Strict-fp handling", or should all this code be next to the existing operations?
> 
> We already have ISD::STRICT_FP_TO_SINT above next to ISD::FP_TO_SINT. And if SVE was added I would expect it to be in the SVE section (not that this is super well laid out). Should the ISD::STRICT_FCOS be next to the ISD::FCOS?
After fiddling about with things a bit it does look like it's probably better to have the handling of OP to be next to STRICT_OP, so I'll do that.


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