[PATCH] D114939: [ARM] Verify addressing immediates

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

In D114939#3183101 <https://reviews.llvm.org/D114939#3183101>, @samtebbs wrote:

> Is this the kind of constraint that can be baked into the operand type in the instruction's `(ins ...)` in tablegen?

Yeah it already is, to a certain degree. The instructions have an AddrMode set in the AM variable, such as set by this MVE instruction: https://github.com/llvm/llvm-project/blob/8dcaf3aa0bf25508700a7452ed963c1487221dfd/llvm/lib/Target/ARM/ARMInstrMVE.td#L6222 (it's a bit hidden there, as it goes through the MVE_memsz. This t2LDRHi8 example is more clear, where it sets AM=AddrModeT2_i8neg https://github.com/llvm/llvm-project/blob/8dcaf3aa0bf25508700a7452ed963c1487221dfd/llvm/lib/Target/ARM/ARMInstrFormats.td#L1402.

That is what we are using here, along with some code already present in the load-store optimizer to validate the range of the immediates in the instruction.


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