[PATCH] D115483: [RISCV] Convert (splat_vector (load)) to vlse with 0 stride.

[Craig Topper via Phabricator via llvm-commits]

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We already do this for splat nodes that carry a VL, but not for
splats that use VLMAX.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D115483

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll

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