[PATCH] D113439: [RISCV] Add IR intrinsics for reading/write vxrm.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D113439#3183941 <https://reviews.llvm.org/D113439#3183941>, @jrtc27 wrote:

> For confusion I meant that doing something other than this patch for vxrm will result in different behaviour between floating-point vector operations (which use the pre-existing scalar float rounding mode that's exposed to C) and fixed-point vector operations (which is what vxrm governs). I believe both should offer the same set of interfaces to users.

Is your opinion that we should do this patch so that they are the same, or that we should change how FP works too?

The floating point interface requires that you use #pragma STDC FENV_ACCESS if you call fesetround. If we implement this patch, that would still be a difference.

Floating point rounding for vectors is currently messed up because we don't mark the FP instruction has having side effects. And no target has defined how to extend constrained intrinsics to target specific intrinsics.

Changing vxrm for integers is potentially going to be more common than changing FP rounding mode. Halide developers have already raised complaints that they need to change vxrm to use vaadd for halving_add and rounding_halving_add. This gets expensive for code that mixes both operations.


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