[PATCH] D113439: [RISCV] Add IR intrinsics for reading/write vxrm.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Given past experiences I've had in the past with registers like this, I'd recommend not implementing these intrinsics in their current state.  Giving the user access to directly mess with registers like this makes IR optimizations harder because we have to model the intrinsics that depend on the register as reading/writing memory.  And there are bad interactions between the register state and calls introduced by the compiler: if the compiler introduces a call, that call might not preserve the state.

Instead, I'd suggest modifying the intrinsics for the instructions that depend on this register: make them take the desired rounding mode as an argument.  You can then lower the intrinsics in the backend: for each instruction that needs a rounding mode, set the rounding mode before it.  This pass that does this lowering can coalesce/hoist the register modifications when appropriate.


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https://reviews.llvm.org/D113439