[llvm] 47e1f67 - [AArch64][GlobalISel] Legalize scalar G_FMAXIMUM + G_FMINIMUM

Jessica Paquette via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 9 11:57:15 PST 2021


Author: Jessica Paquette
Date: 2021-12-09T11:54:14-08:00
New Revision: 47e1f672e18cc59392987242882c03c5ab64f95e

URL: https://github.com/llvm/llvm-project/commit/47e1f672e18cc59392987242882c03c5ab64f95e
DIFF: https://github.com/llvm/llvm-project/commit/47e1f672e18cc59392987242882c03c5ab64f95e.diff

LOG: [AArch64][GlobalISel] Legalize scalar G_FMAXIMUM + G_FMINIMUM

Necessary for implementing some combines on floating point selects.

Differential Revision: https://reviews.llvm.org/D115372

Added: 
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaximum.mir
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminimum.mir

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 1524aa5eb0ec6..e8894e7933d63 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -785,6 +785,11 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
       .libcallFor({s128})
       .minScalar(0, MinFPScalar);
 
+  // TODO: Vector types.
+  getActionDefinitionsBuilder({G_FMAXIMUM, G_FMINIMUM})
+      .legalFor({MinFPScalar, s32, s64})
+      .minScalar(0, MinFPScalar);
+
   // TODO: Libcall support for s128.
   // TODO: s16 should be legal with full FP16 support.
   getActionDefinitionsBuilder({G_LROUND, G_LLROUND})

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaximum.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaximum.mir
new file mode 100644
index 0000000000000..ae396768b5b25
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaximum.mir
@@ -0,0 +1,80 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=FP16
+# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=NO-FP16
+...
+---
+name:            s16_legal_with_full_fp16
+alignment:       4
+body:             |
+  bb.0:
+    liveins: $h0, $h1
+    ; FP16-LABEL: name: s16_legal_with_full_fp16
+    ; FP16: %a:_(s16) = COPY $h0
+    ; FP16-NEXT: %b:_(s16) = COPY $h1
+    ; FP16-NEXT: %legalize_me:_(s16) = G_FMAXIMUM %a, %b
+    ; FP16-NEXT: $h0 = COPY %legalize_me(s16)
+    ; FP16-NEXT: RET_ReallyLR implicit $h0
+    ; NO-FP16-LABEL: name: s16_legal_with_full_fp16
+    ; NO-FP16: %a:_(s16) = COPY $h0
+    ; NO-FP16-NEXT: %b:_(s16) = COPY $h1
+    ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT %a(s16)
+    ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT %b(s16)
+    ; NO-FP16-NEXT: [[FMAXIMUM:%[0-9]+]]:_(s32) = G_FMAXIMUM [[FPEXT]], [[FPEXT1]]
+    ; NO-FP16-NEXT: %legalize_me:_(s16) = G_FPTRUNC [[FMAXIMUM]](s32)
+    ; NO-FP16-NEXT: $h0 = COPY %legalize_me(s16)
+    ; NO-FP16-NEXT: RET_ReallyLR implicit $h0
+    %a:_(s16) = COPY $h0
+    %b:_(s16) = COPY $h1
+    %legalize_me:_(s16) = G_FMAXIMUM %a, %b
+    $h0 = COPY %legalize_me(s16)
+    RET_ReallyLR implicit $h0
+
+...
+---
+name:            s32_legal
+alignment:       4
+body:             |
+  bb.0:
+    liveins: $s0, $s1
+    ; FP16-LABEL: name: s32_legal
+    ; FP16: %a:_(s32) = COPY $s0
+    ; FP16-NEXT: %b:_(s32) = COPY $s1
+    ; FP16-NEXT: %legalize_me:_(s32) = G_FMAXIMUM %a, %b
+    ; FP16-NEXT: $s0 = COPY %legalize_me(s32)
+    ; FP16-NEXT: RET_ReallyLR implicit $s0
+    ; NO-FP16-LABEL: name: s32_legal
+    ; NO-FP16: %a:_(s32) = COPY $s0
+    ; NO-FP16-NEXT: %b:_(s32) = COPY $s1
+    ; NO-FP16-NEXT: %legalize_me:_(s32) = G_FMAXIMUM %a, %b
+    ; NO-FP16-NEXT: $s0 = COPY %legalize_me(s32)
+    ; NO-FP16-NEXT: RET_ReallyLR implicit $s0
+    %a:_(s32) = COPY $s0
+    %b:_(s32) = COPY $s1
+    %legalize_me:_(s32) = G_FMAXIMUM %a, %b
+    $s0 = COPY %legalize_me(s32)
+    RET_ReallyLR implicit $s0
+
+...
+---
+name:            s64_legal
+alignment:       4
+body:             |
+  bb.0:
+    liveins: $d0, $d1
+    ; FP16-LABEL: name: s64_legal
+    ; FP16: %a:_(s64) = COPY $d0
+    ; FP16-NEXT: %b:_(s64) = COPY $d1
+    ; FP16-NEXT: %legalize_me:_(s64) = G_FMAXIMUM %a, %b
+    ; FP16-NEXT: $d0 = COPY %legalize_me(s64)
+    ; FP16-NEXT: RET_ReallyLR implicit $d0
+    ; NO-FP16-LABEL: name: s64_legal
+    ; NO-FP16: %a:_(s64) = COPY $d0
+    ; NO-FP16-NEXT: %b:_(s64) = COPY $d1
+    ; NO-FP16-NEXT: %legalize_me:_(s64) = G_FMAXIMUM %a, %b
+    ; NO-FP16-NEXT: $d0 = COPY %legalize_me(s64)
+    ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
+    %a:_(s64) = COPY $d0
+    %b:_(s64) = COPY $d1
+    %legalize_me:_(s64) = G_FMAXIMUM %a, %b
+    $d0 = COPY %legalize_me(s64)
+    RET_ReallyLR implicit $d0

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminimum.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminimum.mir
new file mode 100644
index 0000000000000..47137b621fee1
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminimum.mir
@@ -0,0 +1,80 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=FP16
+# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=NO-FP16
+...
+---
+name:            s16_legal_with_full_fp16
+alignment:       4
+body:             |
+  bb.0:
+    liveins: $h0, $h1
+    ; FP16-LABEL: name: s16_legal_with_full_fp16
+    ; FP16: %a:_(s16) = COPY $h0
+    ; FP16-NEXT: %b:_(s16) = COPY $h1
+    ; FP16-NEXT: %legalize_me:_(s16) = G_FMINIMUM %a, %b
+    ; FP16-NEXT: $h0 = COPY %legalize_me(s16)
+    ; FP16-NEXT: RET_ReallyLR implicit $h0
+    ; NO-FP16-LABEL: name: s16_legal_with_full_fp16
+    ; NO-FP16: %a:_(s16) = COPY $h0
+    ; NO-FP16-NEXT: %b:_(s16) = COPY $h1
+    ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT %a(s16)
+    ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT %b(s16)
+    ; NO-FP16-NEXT: [[FMINIMUM:%[0-9]+]]:_(s32) = G_FMINIMUM [[FPEXT]], [[FPEXT1]]
+    ; NO-FP16-NEXT: %legalize_me:_(s16) = G_FPTRUNC [[FMINIMUM]](s32)
+    ; NO-FP16-NEXT: $h0 = COPY %legalize_me(s16)
+    ; NO-FP16-NEXT: RET_ReallyLR implicit $h0
+    %a:_(s16) = COPY $h0
+    %b:_(s16) = COPY $h1
+    %legalize_me:_(s16) = G_FMINIMUM %a, %b
+    $h0 = COPY %legalize_me(s16)
+    RET_ReallyLR implicit $h0
+
+...
+---
+name:            s32_legal
+alignment:       4
+body:             |
+  bb.0:
+    liveins: $s0, $s1
+    ; FP16-LABEL: name: s32_legal
+    ; FP16: %a:_(s32) = COPY $s0
+    ; FP16-NEXT: %b:_(s32) = COPY $s1
+    ; FP16-NEXT: %legalize_me:_(s32) = G_FMINIMUM %a, %b
+    ; FP16-NEXT: $s0 = COPY %legalize_me(s32)
+    ; FP16-NEXT: RET_ReallyLR implicit $s0
+    ; NO-FP16-LABEL: name: s32_legal
+    ; NO-FP16: %a:_(s32) = COPY $s0
+    ; NO-FP16-NEXT: %b:_(s32) = COPY $s1
+    ; NO-FP16-NEXT: %legalize_me:_(s32) = G_FMINIMUM %a, %b
+    ; NO-FP16-NEXT: $s0 = COPY %legalize_me(s32)
+    ; NO-FP16-NEXT: RET_ReallyLR implicit $s0
+    %a:_(s32) = COPY $s0
+    %b:_(s32) = COPY $s1
+    %legalize_me:_(s32) = G_FMINIMUM %a, %b
+    $s0 = COPY %legalize_me(s32)
+    RET_ReallyLR implicit $s0
+
+...
+---
+name:            s64_legal
+alignment:       4
+body:             |
+  bb.0:
+    liveins: $d0, $d1
+    ; FP16-LABEL: name: s64_legal
+    ; FP16: %a:_(s64) = COPY $d0
+    ; FP16-NEXT: %b:_(s64) = COPY $d1
+    ; FP16-NEXT: %legalize_me:_(s64) = G_FMINIMUM %a, %b
+    ; FP16-NEXT: $d0 = COPY %legalize_me(s64)
+    ; FP16-NEXT: RET_ReallyLR implicit $d0
+    ; NO-FP16-LABEL: name: s64_legal
+    ; NO-FP16: %a:_(s64) = COPY $d0
+    ; NO-FP16-NEXT: %b:_(s64) = COPY $d1
+    ; NO-FP16-NEXT: %legalize_me:_(s64) = G_FMINIMUM %a, %b
+    ; NO-FP16-NEXT: $d0 = COPY %legalize_me(s64)
+    ; NO-FP16-NEXT: RET_ReallyLR implicit $d0
+    %a:_(s64) = COPY $d0
+    %b:_(s64) = COPY $d1
+    %legalize_me:_(s64) = G_FMINIMUM %a, %b
+    $d0 = COPY %legalize_me(s64)
+    RET_ReallyLR implicit $d0

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index f43c458a8dd8d..ffb87fd55d111 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -497,11 +497,12 @@
 # DEBUG: .. type index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: G_FMINIMUM (opcode {{[0-9]+}}): 1 type index
-# DEBUG: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
+# DEBUG-NEXT: .. the first uncovered type index: 1, OK
+# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_FMAXIMUM (opcode {{[0-9]+}}): 1 type index
-# DEBUG: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. the first uncovered type index: 1, OK
+# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_PTR_ADD (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
 # DEBUG-NEXT: .. the first uncovered type index: 2, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK


        


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