[PATCH] D115457: [AArch64] Convert sra(X, elt_size(X)-1) to cmlt(X, 0)
Alexandros Lamprineas via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 9 11:06:00 PST 2021
labrinea created this revision.
labrinea added reviewers: llvm-commits, SjoerdMeijer, dmgreen, momchil.velikov.
Herald added subscribers: hiraditya, kristof.beyls.
labrinea requested review of this revision.
Herald added a project: LLVM.
Do not perform the transformation if the user is ADD, in which case we would rather select ssra(X, elt_size(X)-1) instead.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D115457
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/Analysis/CostModel/AArch64/vector-select.ll
llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
llvm/test/CodeGen/AArch64/arm64-vshr.ll
llvm/test/CodeGen/AArch64/cmp-select-sign.ll
llvm/test/CodeGen/AArch64/dag-numsignbits.ll
llvm/test/CodeGen/AArch64/div_minsize.ll
llvm/test/CodeGen/AArch64/selectcc-to-shiftand.ll
llvm/test/CodeGen/AArch64/srem-seteq-vec-splat.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-fp-vselect.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
llvm/test/CodeGen/AArch64/vec_uaddo.ll
llvm/test/CodeGen/AArch64/vec_umulo.ll
llvm/test/CodeGen/AArch64/vselect-constants.ll
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