[llvm] 622d689 - [RISCV] Revise RISCVInstPrinter::printVTypeI to not assume there are 3 invalid vtype bits.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2021-12-07T09:40:50-08:00
New Revision: 622d6894801b19e795737e133f5963d248de45af

URL: https://github.com/llvm/llvm-project/commit/622d6894801b19e795737e133f5963d248de45af
DIFF: https://github.com/llvm/llvm-project/commit/622d6894801b19e795737e133f5963d248de45af.diff

LOG: [RISCV] Revise RISCVInstPrinter::printVTypeI to not assume there are 3 invalid vtype bits.

Instead of checking [10:8]. Check for non-zero in 8 and above.

Addresses a post-commit comment from @jrtc27 in D114581.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
index f1c3810f4ee53..89a7d54f60f86 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
@@ -171,9 +171,9 @@ void RISCVInstPrinter::printVTypeI(const MCInst *MI, unsigned OpNo,
                                    const MCSubtargetInfo &STI, raw_ostream &O) {
   unsigned Imm = MI->getOperand(OpNo).getImm();
   // Print the raw immediate for reserved values: vlmul[2:0]=4, vsew[2:0]=0b1xx,
-  // or non-zero bits 8/9/10.
+  // or non-zero in bits 8 and above.
   if (RISCVVType::getVLMUL(Imm) == RISCVII::VLMUL::LMUL_RESERVED ||
-      RISCVVType::getSEW(Imm) > 64 || (Imm & 0x700) != 0) {
+      RISCVVType::getSEW(Imm) > 64 || (Imm >> 8) != 0) {
     O << Imm;
     return;
   }