[PATCH] D115166: [AArch64][SVE] Fix fptrunc store for fixed len vector

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15989-15990
+      Value.getValueType().isFixedLengthVector() &&
+      Value.getValueType().getFixedSizeInBits() >
+          Subtarget->getMinSVEVectorSizeInBits())
     return DAG.getTruncStore(Chain, SDLoc(N), Value.getOperand(0), Ptr,
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Looking at the regressions in `fcvt_v8f64_v8f32` and `fcvt_v16f32_v16f16` I'm wondering if this wants to be `>=` instead?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115166/new/

https://reviews.llvm.org/D115166