[llvm] b206ee6 - [MachineVerifier] Make TiedOpsRewritten computable in MIRParser
Kai Luo via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 6 18:25:21 PST 2021
Author: Kai Luo
Date: 2021-12-07T02:25:15Z
New Revision: b206ee69061120d559d8315bede6c63758b06154
URL: https://github.com/llvm/llvm-project/commit/b206ee69061120d559d8315bede6c63758b06154
DIFF: https://github.com/llvm/llvm-project/commit/b206ee69061120d559d8315bede6c63758b06154.diff
LOG: [MachineVerifier] Make TiedOpsRewritten computable in MIRParser
This patch is to address post-commit comment https://reviews.llvm.org/D80538#anchor-inline-1091625, which make the constraint stronger based on what https://reviews.llvm.org/D80538 does, i.e., "TiedOpsRewritten is set iff leave-ssa and all tied operands share the same register".
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D114573
Added:
Modified:
llvm/lib/CodeGen/MIRParser/MIRParser.cpp
llvm/unittests/MIR/MachineMetadata.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index aaf44f52f63cd..d0323eaf3d784 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -350,18 +350,33 @@ void MIRParserImpl::computeFunctionProperties(MachineFunction &MF) {
bool HasPHI = false;
bool HasInlineAsm = false;
+ bool AllTiedOpsRewritten = true, HasTiedOps = false;
for (const MachineBasicBlock &MBB : MF) {
for (const MachineInstr &MI : MBB) {
if (MI.isPHI())
HasPHI = true;
if (MI.isInlineAsm())
HasInlineAsm = true;
+ for (unsigned I = 0; I < MI.getNumOperands(); ++I) {
+ const MachineOperand &MO = MI.getOperand(I);
+ if (!MO.isReg() || !MO.getReg())
+ continue;
+ unsigned DefIdx;
+ if (MO.isUse() && MI.isRegTiedToDefOperand(I, &DefIdx)) {
+ HasTiedOps = true;
+ if (MO.getReg() != MI.getOperand(DefIdx).getReg())
+ AllTiedOpsRewritten = false;
+ }
+ }
}
}
if (!HasPHI)
Properties.set(MachineFunctionProperties::Property::NoPHIs);
MF.setHasInlineAsm(HasInlineAsm);
+ if (HasTiedOps && AllTiedOpsRewritten)
+ Properties.set(MachineFunctionProperties::Property::TiedOpsRewritten);
+
if (isSSA(MF))
Properties.set(MachineFunctionProperties::Property::IsSSA);
else
diff --git a/llvm/unittests/MIR/MachineMetadata.cpp b/llvm/unittests/MIR/MachineMetadata.cpp
index 93490a5369d4b..ddeb11ed0e9ea 100644
--- a/llvm/unittests/MIR/MachineMetadata.cpp
+++ b/llvm/unittests/MIR/MachineMetadata.cpp
@@ -537,3 +537,65 @@ CHECK: %5:vgpr_32 = FLAT_LOAD_DWORD killed %4, 0, 0, implicit $exec, implicit $f
)";
EXPECT_TRUE(checkOutput(CheckString, Output));
}
+
+TEST_F(MachineMetadataTest, TiedOpsRewritten) {
+ auto TM = createTargetMachine(Triple::normalize("powerpc64--"), "", "");
+ if (!TM)
+ GTEST_SKIP();
+ StringRef MIRString = R"MIR(
+---
+name: foo
+alignment: 16
+tracksRegLiveness: true
+frameInfo:
+ maxAlignment: 16
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ liveins: $r3
+ %0:gprc = COPY $r3
+ %0 = RLWIMI killed %0, $r3, 1, 0, 30
+ $r3 = COPY %0
+ BLR8 implicit $r3, implicit $lr8, implicit $rm
+
+...
+)MIR";
+ MachineModuleInfo MMI(TM.get());
+ M = parseMIR(*TM, MIRString, "foo", MMI);
+ ASSERT_TRUE(M);
+ auto *MF = MMI.getMachineFunction(*M->getFunction("foo"));
+ MachineFunctionProperties &Properties = MF->getProperties();
+ ASSERT_TRUE(Properties.hasProperty(
+ MachineFunctionProperties::Property::TiedOpsRewritten));
+}
+
+TEST_F(MachineMetadataTest, NoTiedOpsRewritten) {
+ auto TM = createTargetMachine(Triple::normalize("powerpc64--"), "", "");
+ if (!TM)
+ GTEST_SKIP();
+ StringRef MIRString = R"MIR(
+---
+name: foo
+alignment: 16
+tracksRegLiveness: true
+frameInfo:
+ maxAlignment: 16
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ liveins: $r3
+ %0:gprc = COPY $r3
+ %1:gprc = RLWIMI killed %0, $r3, 1, 0, 30
+ $r3 = COPY %1
+ BLR8 implicit $r3, implicit $lr8, implicit $rm
+
+...
+)MIR";
+ MachineModuleInfo MMI(TM.get());
+ M = parseMIR(*TM, MIRString, "foo", MMI);
+ ASSERT_TRUE(M);
+ auto *MF = MMI.getMachineFunction(*M->getFunction("foo"));
+ MachineFunctionProperties &Properties = MF->getProperties();
+ ASSERT_FALSE(Properties.hasProperty(
+ MachineFunctionProperties::Property::TiedOpsRewritten));
+}
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