[PATCH] D113353: [RISCV] Add scheduling resources for Vector pseudo instructions.
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 6 17:15:08 PST 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2ba769842396: [RISCV] Add scheduling resources for Vector pseudo instructions. (authored by evandro, committed by HsiangKai).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D113353/new/
https://reviews.llvm.org/D113353
Files:
llvm/lib/Target/RISCV/RISCVInstrFormats.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/lib/Target/RISCV/RISCVSchedRocket.td
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