[PATCH] D115047: [SVE][InstCombine] Support more cases where ld1/st1 can be lowered to load instructions.

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm created this revision.
Herald added subscribers: psnobl, hiraditya, tschuett.
Herald added a reviewer: efriedma.
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This patch extends the "is all active predicate" check to cover
cases where the predicate is casted but in a way that doesn't
change its "all active" status.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D115047

Files:
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-loadstore.ll

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