[PATCH] D115002: [ASan] Changed intrisic implemenation to use PLT safe registers.

[Vitaly Buka via Phabricator via llvm-commits]

vitalybuka accepted this revision.
vitalybuka added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/test/CodeGen/X86/musttail-varargs.ll:85
 ; LINUX-NEXT:    movq %r12, %r8
+; LINUX-NEXT:    movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
 ; LINUX-NEXT:    movq %r15, %r9
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kstoimenov wrote:
> For some reason adding a new class changed the instruction order. What would be the best way to verify that this is not breaking functionality? 
not sure. does check-all pass?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115002/new/

https://reviews.llvm.org/D115002