[llvm] 603a39b - Run update_test_checks.py on test cases.

Mingming Liu via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 2 16:26:37 PST 2021


Author: Mingming Liu
Date: 2021-12-03T00:25:14Z
New Revision: 603a39b670c72d52edfe1866db2d87c276bc88ae

URL: https://github.com/llvm/llvm-project/commit/603a39b670c72d52edfe1866db2d87c276bc88ae
DIFF: https://github.com/llvm/llvm-project/commit/603a39b670c72d52edfe1866db2d87c276bc88ae.diff

LOG: Run update_test_checks.py on test cases.

In this way, each instruction has a line, and diffs will be more clear.

Differential Revision: https://reviews.llvm.org/D115006

Added: 
    

Modified: 
    llvm/test/Transforms/SROA/alloca-struct.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SROA/alloca-struct.ll b/llvm/test/Transforms/SROA/alloca-struct.ll
index 17257ea6cdc10..d205b65f30ff1 100644
--- a/llvm/test/Transforms/SROA/alloca-struct.ll
+++ b/llvm/test/Transforms/SROA/alloca-struct.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -sroa -S | FileCheck %s
 ; RUN: opt < %s -passes=sroa -S | FileCheck %s
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
@@ -14,17 +15,33 @@ target triple = "x86_64-unknown-linux-gnu"
 define i64 @test_struct_of_int_char(i1 zeroext %test, i64 ()* %p) {
 ; CHECK-LABEL: @test_struct_of_int_char(
 ; CHECK-NEXT:  entry:
-; COM: Check that registers are used and alloca instructions are eliminated.
-; CHECK-NOT:     alloca
+; CHECK-NEXT:    br i1 [[TEST:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
 ; CHECK:       if.then:
 ; CHECK-NEXT:    br label [[RETURN:%.*]]
 ; CHECK:       if.end:
-; CHECK-NEXT:    call i64 [[P:%.*]]()
-; CHECK:    br label [[RETURN]]
+; CHECK-NEXT:    [[CALL:%.*]] = call i64 [[P:%.*]]()
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[CALL]] to i32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_EXTRACT_SHIFT:%.*]] = lshr i64 [[CALL]], 32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[RETVAL_SROA_3_0_EXTRACT_SHIFT]] to i8
+; CHECK-NEXT:    [[RETVAL_SROA_4_0_EXTRACT_SHIFT:%.*]] = lshr i64 [[CALL]], 40
+; CHECK-NEXT:    [[RETVAL_SROA_4_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[RETVAL_SROA_4_0_EXTRACT_SHIFT]] to i24
+; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
-; COM: Check there are more than one PHI nodes to select scalarized values.
-; CHECK-COUNT-3: phi
-; CHECK:         ret i64
+; CHECK-NEXT:    [[RETVAL_SROA_4_SROA_0_0:%.*]] = phi i24 [ undef, [[IF_THEN]] ], [ [[RETVAL_SROA_4_0_EXTRACT_TRUNC]], [[IF_END]] ]
+; CHECK-NEXT:    [[RETVAL_SROA_3_0:%.*]] = phi i8 [ 0, [[IF_THEN]] ], [ [[RETVAL_SROA_3_0_EXTRACT_TRUNC]], [[IF_END]] ]
+; CHECK-NEXT:    [[RETVAL_SROA_0_0:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ [[RETVAL_SROA_0_0_EXTRACT_TRUNC]], [[IF_END]] ]
+; CHECK-NEXT:    [[RETVAL_SROA_4_0_INSERT_EXT:%.*]] = zext i24 [[RETVAL_SROA_4_SROA_0_0]] to i64
+; CHECK-NEXT:    [[RETVAL_SROA_4_0_INSERT_SHIFT:%.*]] = shl i64 [[RETVAL_SROA_4_0_INSERT_EXT]], 40
+; CHECK-NEXT:    [[RETVAL_SROA_4_0_INSERT_MASK:%.*]] = and i64 undef, 1099511627775
+; CHECK-NEXT:    [[RETVAL_SROA_4_0_INSERT_INSERT:%.*]] = or i64 [[RETVAL_SROA_4_0_INSERT_MASK]], [[RETVAL_SROA_4_0_INSERT_SHIFT]]
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_EXT:%.*]] = zext i8 [[RETVAL_SROA_3_0]] to i64
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_SHIFT:%.*]] = shl i64 [[RETVAL_SROA_3_0_INSERT_EXT]], 32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_MASK:%.*]] = and i64 [[RETVAL_SROA_4_0_INSERT_INSERT]], -1095216660481
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_INSERT:%.*]] = or i64 [[RETVAL_SROA_3_0_INSERT_MASK]], [[RETVAL_SROA_3_0_INSERT_SHIFT]]
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_EXT:%.*]] = zext i32 [[RETVAL_SROA_0_0]] to i64
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_MASK:%.*]] = and i64 [[RETVAL_SROA_3_0_INSERT_INSERT]], -4294967296
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_INSERT:%.*]] = or i64 [[RETVAL_SROA_0_0_INSERT_MASK]], [[RETVAL_SROA_0_0_INSERT_EXT]]
+; CHECK-NEXT:    ret i64 [[RETVAL_SROA_0_0_INSERT_INSERT]]
 ;
 entry:
   %retval = alloca %struct.RetValIntChar, align 4
@@ -53,16 +70,28 @@ return:                                           ; preds = %if.end, %if.then
 define i64 @test_struct_of_two_int(i1 zeroext %test, i64 ()* %p) {
 ; CHECK-LABEL: @test_struct_of_two_int(
 ; CHECK-NEXT:  entry:
-; CHECK-NOT:     alloca 
+; CHECK-NEXT:    br i1 [[TEST:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
 ; CHECK:       if.then:
 ; CHECK-NEXT:    br label [[RETURN:%.*]]
 ; CHECK:       if.end:
-; CHECK-NEXT:    call i64
+; CHECK-NEXT:    [[CALL:%.*]] = call i64 [[P:%.*]]()
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[CALL]] to i32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_EXTRACT_SHIFT:%.*]] = lshr i64 [[CALL]], 32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[RETVAL_SROA_3_0_EXTRACT_SHIFT]] to i32
+; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
-; COM: Check that there are more than one PHI nodes to select the scalarized values.
-; CHECK-COUNT-2: phi
-; CHECK:         ret i64
+; CHECK-NEXT:    [[RETVAL_SROA_3_0:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ [[RETVAL_SROA_3_0_EXTRACT_TRUNC]], [[IF_END]] ]
+; CHECK-NEXT:    [[RETVAL_SROA_0_0:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ [[RETVAL_SROA_0_0_EXTRACT_TRUNC]], [[IF_END]] ]
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_EXT:%.*]] = zext i32 [[RETVAL_SROA_3_0]] to i64
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_SHIFT:%.*]] = shl i64 [[RETVAL_SROA_3_0_INSERT_EXT]], 32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_MASK:%.*]] = and i64 undef, 4294967295
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_INSERT:%.*]] = or i64 [[RETVAL_SROA_3_0_INSERT_MASK]], [[RETVAL_SROA_3_0_INSERT_SHIFT]]
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_EXT:%.*]] = zext i32 [[RETVAL_SROA_0_0]] to i64
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_MASK:%.*]] = and i64 [[RETVAL_SROA_3_0_INSERT_INSERT]], -4294967296
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_INSERT:%.*]] = or i64 [[RETVAL_SROA_0_0_INSERT_MASK]], [[RETVAL_SROA_0_0_INSERT_EXT]]
+; CHECK-NEXT:    ret i64 [[RETVAL_SROA_0_0_INSERT_INSERT]]
 ;
+
 entry:
   %retval = alloca %struct.RetValTwoInts, align 4
   br i1 %test, label %if.then, label %if.end
@@ -91,16 +120,30 @@ return:                                           ; preds = %if.end, %if.then
 define i64 @test_one_field_has_runtime_value(i1 zeroext %test, i64 ()* %p) {
 ; CHECK-LABEL: @test_one_field_has_runtime_value(
 ; CHECK-NEXT:  entry:
-; CHECK-NOT:     alloca
-; CHECK:         call void @srand
+; CHECK-NEXT:    [[CALL:%.*]] = call i64 @time(i64* null)
+; CHECK-NEXT:    [[CONV:%.*]] = trunc i64 [[CALL]] to i32
+; CHECK-NEXT:    call void @srand(i32 [[CONV]])
+; CHECK-NEXT:    br i1 [[TEST:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
 ; CHECK:       if.then:
-; CHECK-NEXT:    call i32 @rand()
-; CHECK-NEXT:    br label
+; CHECK-NEXT:    [[CALL1:%.*]] = call i32 @rand()
+; CHECK-NEXT:    br label [[RETURN:%.*]]
 ; CHECK:       if.end:
-; CHECK-NEXT:    call i64
+; CHECK-NEXT:    [[CALL2:%.*]] = call i64 [[P:%.*]]()
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[CALL2]] to i32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_EXTRACT_SHIFT:%.*]] = lshr i64 [[CALL2]], 32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[RETVAL_SROA_3_0_EXTRACT_SHIFT]] to i32
+; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
-; CHECK-COUNT-2: phi i32
-; CHECK:         ret i64
+; CHECK-NEXT:    [[RETVAL_SROA_3_0:%.*]] = phi i32 [ 1, [[IF_THEN]] ], [ [[RETVAL_SROA_3_0_EXTRACT_TRUNC]], [[IF_END]] ]
+; CHECK-NEXT:    [[RETVAL_SROA_0_0:%.*]] = phi i32 [ [[CALL1]], [[IF_THEN]] ], [ [[RETVAL_SROA_0_0_EXTRACT_TRUNC]], [[IF_END]] ]
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_EXT:%.*]] = zext i32 [[RETVAL_SROA_3_0]] to i64
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_SHIFT:%.*]] = shl i64 [[RETVAL_SROA_3_0_INSERT_EXT]], 32
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_MASK:%.*]] = and i64 undef, 4294967295
+; CHECK-NEXT:    [[RETVAL_SROA_3_0_INSERT_INSERT:%.*]] = or i64 [[RETVAL_SROA_3_0_INSERT_MASK]], [[RETVAL_SROA_3_0_INSERT_SHIFT]]
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_EXT:%.*]] = zext i32 [[RETVAL_SROA_0_0]] to i64
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_MASK:%.*]] = and i64 [[RETVAL_SROA_3_0_INSERT_INSERT]], -4294967296
+; CHECK-NEXT:    [[RETVAL_SROA_0_0_INSERT_INSERT:%.*]] = or i64 [[RETVAL_SROA_0_0_INSERT_MASK]], [[RETVAL_SROA_0_0_INSERT_EXT]]
+; CHECK-NEXT:    ret i64 [[RETVAL_SROA_0_0_INSERT_INSERT]]
 ;
 entry:
   %retval = alloca %struct.RetValTwoInts, align 4


        


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