[PATCH] D114959: Print target inline asm memory constraints
Boris Boesler via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 2 07:01:54 PST 2021
borisboesler created this revision.
borisboesler added reviewers: dsanders, sdardis, kschwarz.
Herald added subscribers: dexonsmith, hiraditya.
borisboesler requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
In LLVM target dependent inline asm constraints can be defined - for registers and memories. But if `MachineInstr`s are printed, LLVM fails in `InlineAsm::getMemConstraintName()` to print target inline asm memory constraints.
With this patch memory constraints can be defined starting at `InlineAsm::Constraints_Max + 1` and can be printed by overwriting virtual method `TargetInstrInfo::getInlineAsmMemConstraintName`.
https://reviews.llvm.org/D114959
Files:
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/include/llvm/IR/InlineAsm.h
llvm/lib/CodeGen/MachineInstr.cpp
llvm/lib/CodeGen/TargetInstrInfo.cpp
Index: llvm/lib/CodeGen/TargetInstrInfo.cpp
===================================================================
--- llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -135,6 +135,12 @@
return Length;
}
+/// Return the target constraint name
+StringRef
+TargetInstrInfo::getInlineAsmMemConstraintName(unsigned Constraint) const {
+ return InlineAsm::getMemConstraintName(Constraint);
+}
+
/// ReplaceTailWithBranchTo - Delete the instruction OldInst and everything
/// after it, replacing it with an unconditional branch to NewDest.
void
@@ -1389,7 +1395,7 @@
if (InlineAsm::isMemKind(Flag)) {
unsigned MCID = InlineAsm::getMemoryConstraintID(Flag);
- OS << ":" << InlineAsm::getMemConstraintName(MCID);
+ OS << ":" << getInlineAsmMemConstraintName(MCID);
}
unsigned TiedTo = 0;
Index: llvm/lib/CodeGen/MachineInstr.cpp
===================================================================
--- llvm/lib/CodeGen/MachineInstr.cpp
+++ llvm/lib/CodeGen/MachineInstr.cpp
@@ -1757,7 +1757,10 @@
if (InlineAsm::isMemKind(Flag)) {
unsigned MCID = InlineAsm::getMemoryConstraintID(Flag);
- OS << ":" << InlineAsm::getMemConstraintName(MCID);
+ if (TII)
+ OS << ":" << TII -> getInlineAsmMemConstraintName(MCID);
+ else
+ OS << ":CONSTRAINT" << MCID;
}
unsigned TiedTo = 0;
Index: llvm/include/llvm/IR/InlineAsm.h
===================================================================
--- llvm/include/llvm/IR/InlineAsm.h
+++ llvm/include/llvm/IR/InlineAsm.h
@@ -315,7 +315,6 @@
static unsigned getFlagWordForMem(unsigned InputFlag, unsigned Constraint) {
assert(isMemKind(InputFlag) && "InputFlag is not a memory constraint!");
assert(Constraint <= 0x7fff && "Too large a memory constraint ID");
- assert(Constraint <= Constraints_Max && "Unknown constraint ID");
assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
return InputFlag | (Constraint << Constraints_ShiftAmount);
}
Index: llvm/include/llvm/CodeGen/TargetInstrInfo.h
===================================================================
--- llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -1505,6 +1505,9 @@
const char *Str, const MCAsmInfo &MAI,
const TargetSubtargetInfo *STI = nullptr) const;
+ /// Return the target inline asm constraint name
+ virtual StringRef getInlineAsmMemConstraintName(unsigned Constraint) const;
+
/// Allocate and return a hazard recognizer to use for this target when
/// scheduling the machine instructions before register allocation.
virtual ScheduleHazardRecognizer *
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